twizzler_driver/dma/
mod.rs

1//! Module for managing DMA memory, using objects for DMA, and creating pools of DMA memory that can
2//! be allocated from. Internally, the DMA functions will interact with the kernel to ensure
3//! stability of physical addresses for DMA memory, and will also ensure proper coherence between
4//! the host and devices.
5
6mod object;
7mod pin;
8mod pool;
9mod region;
10
11use std::cell::UnsafeCell;
12
13pub use object::DmaObject;
14pub use pin::{DmaPin, PhysAddr, PhysInfo, PinError};
15pub use pool::DmaPool;
16pub use region::{DmaRegion, DmaSliceRegion};
17
18pub use super::arch::DMA_PAGE_SIZE;
19
20#[derive(Debug, Clone, Copy, PartialEq, PartialOrd, Ord, Eq, Hash)]
21/// Intended access direction for DMA memory.
22pub enum Access {
23    /// The memory is used for the host to write and the device to read. Device writes may not be
24    /// coherent.
25    HostToDevice,
26    /// The memory is used for the host to read and the device to write. Host writes may not be
27    /// coherent.
28    DeviceToHost,
29    /// The memory is accessed read/write by both device and host.
30    BiDirectional,
31}
32
33#[derive(Debug, Clone, Copy, PartialEq, PartialOrd, Ord, Eq, Hash)]
34/// Mode of syncing to apply when calling `sync()`. These sync calls are unnecessary by default, and
35/// should only be used with utmost care.
36pub enum SyncMode {
37    /// Ensures coherence for the host to write to the device, ensuring that the memory is coherent
38    /// from the perspective of the CPU before the host writes.
39    PreCpuToDevice,
40    /// Ensures coherence for the host to write to the device, ensuring that the memory is coherent
41    /// after the write.
42    PostCpuToDevice,
43    /// Ensures coherence for the device to write to the host, ensuring that the memory is coherent
44    /// before the device performs an operation.
45    PreDeviceToCpu,
46    /// Ensures coherence for the device to write to the host, ensuring that the memory is coherent
47    /// after the device performs an operation.
48    PostDeviceToCpu,
49    /// Ensures that memory is fully coherent.
50    FullCoherence,
51}
52
53bitflags::bitflags! {
54    /// Options for DMA regions.
55    #[derive(Clone, Copy, Debug)]
56    pub struct DmaOptions : u64 {
57        /// Region functions will not perform automatic coherence.
58        const UNSAFE_MANUAL_COHERENCE = 1;
59    }
60}
61
62impl Default for DmaOptions {
63    fn default() -> Self {
64        Self::empty()
65    }
66}
67
68/// DMA types must implement this trait, which indicates that types can handle untyped updates from
69/// the device.
70pub auto trait DeviceSync {}
71
72impl DeviceSync for u8 {}
73impl DeviceSync for u16 {}
74impl DeviceSync for u32 {}
75impl DeviceSync for u64 {}
76impl DeviceSync for i8 {}
77impl DeviceSync for i16 {}
78impl DeviceSync for i32 {}
79impl DeviceSync for i64 {}
80
81impl<T> !DeviceSync for *const T {}
82impl<T> !DeviceSync for *mut T {}
83impl<T> !DeviceSync for &T {}
84impl<T> !DeviceSync for &mut T {}
85impl<T: ?Sized> !DeviceSync for UnsafeCell<T> {}
86impl<T: ?Sized> !DeviceSync for std::cell::Cell<T> {}